ISL58214
Register Bit Description
TABLE 1. CR0: CONTROL REGISTER 0 (REG X-00)
BIT
B7
B6-B2
B1
B0
BIT
B7
B6-B4
B3
B2-B0
BIT
B7
B6
B5
B4
B3-B0
BIT
B7, B3
B2
B1
B0
BIT
B7-B0
NAME
SELECT I SNK
Reserved
OE
CE
NAME
HFMCNTEN
Reserved
HFMOSCEN
Reserved
NAME
Reserved
PAGEAUTO
PAGESEL1
PAGESEL0
Reserved
NAME
Reserved
Color Enabled
reserved
PWR OK
NAME
SCALE-H
13
BIT DEFINITION
Use in conjunction with Reg 2-27 bit 1
If B7 = 0 and Reg 2-27[1] = 0, ISRC is selected.
If B7 = 1 and Reg 2-27[1] = 1, I SNK is selected.
Leave as 00000
Laser Output Enable
1: Enable laser output stage.
0: Disable laser output stage.
Chip Enable
1: Enable device.
0: Deep sleep, analog portion of the chip is powered down. SDIO still active.
The ENA pin is ANDed with CE bit to generate internal Chip Enable.
TABLE 2. CR1: CONTROL REGISTER 1 (REG X-01)
BIT DEFINITION
HFM Counter Enable for measuring HFM frequency
1: Enable HFM counter.
0: Disable HFM counter (conserve power).
Leave 000
HFM Oscillator Enable
1: Enable.
0: Disable.
Leave 000
TABLE 3. CR2: CONTROL REGISTER 2 (Reg X-02)
BIT DEFINITION
Leave 0
B6 = 0 means that the memory page will not auto toggle.
B6 = 1 means that the Memory Page will Auto-toggle between Page0 and Page2
Memory Page Select
00: Set accessed page to Page 0
01: Set accessed page to Page 1
10: Set accessed page to Page 2
11: Reserved
Leave 0000
TABLE 4. SR1: STATUS REGISTER (REG X-03)
BIT DEFINITION
1 means color current is enabled. 0 means color current is not enabled
1 means that both the 5V and internal 2.5V supplies are above the detection levels. 0 means that one or
both supplies are below the detection levels. The detection levels are below the minimum specified.
TABLE 5. SCALE-H: POWER MAX HIGH (REG 0-15)
BIT DEFINITION
SCALE-H - High Order Bits Iw = k(512B7 +256B6 + .... +8B1 +4B0 + Reg 2-15)
FN6944.1
July 29, 2013
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